Do you have any guidelines for running 48 V through NeXLev? Are there applications out there that do this sort of thing?
One of the things we can do is run the power through an end wafer, and leave an empty slot in the second position. That would give us additional clearance, or spacing, to isolate the 48 volts. UL-1950 governs the amount of spacing that’s required at higher voltages. It may make more sense, seeing as how we’d need to provide a -48 V ground return, to load the wafers : +48 V power–space—48 V return–space-full load the remaining wafers. In just about all of the designs we’ve worked with before, the 48 V is run to the daughter-card, stepped down there, and then run at lower voltages to the mezzanine card. It is usually driven by what makes sense from the system architecture point of view.
