Xilinx changed the pinout of the download cable?
18970: 99/11/23: Re: VHDL vs. schematic entry 19071: 99/11/26: Xilinx FPGA Editor guessing games solved! 19074: 99/11/27: Re: Xilinx FPGA Editor guessing games solved! 19082: 99/11/28: Re: Xilinx FPGA Editor guessing games solved! 19167: 99/12/03: Re: Command line for FPGA Express 19191: 99/12/04: Re: Command line for FPGA Express 19340: 99/12/15: Re: State machine ok with binary encoding but unstable with one hot encoding 19341: 99/12/15: Re: State machine ok with binary encoding but unstable with one hot encoding 19350: 99/12/15: Re: State machine ok with binary encoding but unstable with one hot encoding 19355: 99/12/15: Re: State machine ok with binary encoding but unstable with one hot encoding 19545: 99/12/30: Re: PCI slot 3.3V pins. 19556: 99/12/30: Re: PCI slot 3.3V pins.