Why is Xilinx launching an Internet design reuse initiative for programmable logic?
In October 1998, Xilinx announced the Virtex series, the world’s first FPGA family to offer one million system gates. In September of 1999, Xilinx announced the Virtex-E series, which offers FPGAs with up to three million system gates. The rapid market acceptance of these very large programmable logic devices by traditional ASIC designers is driving the Xilinx reuse initiative. In the past, designers have turned to programmable logic because it offers tremendous flexibility and time-to-market advantages over gate array or standard cell technologies. As FPGAs become ever larger, one way to help retain this time-to-market advantage is through the reuse of intellectual property developed by customers for earlier designs. The Xilinx design reuse initiative will benefit programmable logic customers who develop their own IP, and it will benefit third-party IP developers in the Xilinx AllianceCORE program. The Internet component continues the Xilinx Silicon Xpresso initiative which the compan
