Why does the code run slowly from flash when NXP claims that the chip runs with nearly zero wait states from flash?
On reset, the Memory Accelerator Module (MAM) is disabled but the MAM Timing register has a reset value of 0x7, which means that 6 wait states are inserted for every flash access. You need to set it depending upon the frequency at which you are running. If you are running your application below or at 20 MHz you can set this register to 0x1, which implies no wait states.
