Why does the 750FX and 750GX documents say that “most” single-bit errors are corrected?
In fact, all double-bit errors are detected, and all single-bit errors are corrected. However, these processors are shipped with up to a small number of known bit-stuck errors in the L2 data SRAMs. ECC automatically corrects these bits as the location is accessed, so the data is not in danger. However, since these errors are “hard-wired” into the cache, they reduce the ECC protection in that Dword for soft errors, so for that Dword, the ECC effectively detects all single-bit soft errors, and does not correct double-bit errors. In other words, a single-bit soft error would be detected as a double-bit error, and might not be correctable.
