Why does RocketIO Wizard always create dual GT11 tranceiver blocks?
85326: 05/06/07: Re: FPGA/CPLD trend 86032: 05/06/20: Re: 5 Volt tolerance – Altera 95600: 06/01/24: Verilog tutorial by John Sanguinetti 95761: 06/01/25: Re: Verilog tutorial by John Sanguinetti 97610: 06/02/24: Re: bypass between ilogic and ologic 103665: 06/06/07: Re: IOBDELAY’s delay value 103810: 06/06/12: Re: from VHDL to FPGA 104558: 06/06/29: Re: Xilinx BUFGMUX Setup Time requirement clarification needed 104592: 06/06/30: Re: Spartan3e starter kit vga mod 104821