Where is the CriticalBlue microcode stored and how is it downloaded onto the coprocessor?
Are there ROMs in the architecture? A Cascade coprocessor contains an instruction memory unit that holds the microcode. Cascade automatically places the microcode in a data section within the overall main processor executable. Thus, Cascade’s microcode download mechanism is the same as that for main processor code download. There are no ROMs in the architecture because this would destroy the flexibility afforded by microcode changes.
