Whats the problem when a gray bar is shown as one of my outputs for a Xilinx simulation?
Usually one of two things: either you don’t have all of your gate inputs connected to wires, or you don’t have the schematic saved or added to the project. To make sure you have your gate inputs connected, there should be wires going into each one. Even if you line up a gate output directly with a gate input, Xilinx will not realize they are really connected unless you run a wire from the output of one to the input of another. • Q: Where can I download the xilinx software and its documentation from? A: Download the version 6.3i ISE WebPACK software. You’ll also want to get the MXE Simulator. Also, get the ISE Service Pack and the ModelSim Simulation Library Update. After you install ModelSim, you’ll need to submit a license request from the computer you plan to use Xilinx from. Then, to install the library update, unzip the file to the ModelSim installation directory (C:\Modeltech_XE). For additional information refer to the manual/documentation. The version in the lab is 6.2i. • Q: Do
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- Whats the problem when a gray bar is shown as one of my outputs for a Xilinx simulation?
