Whats the difference between a conflict and capacity miss?
A11.2: A conflict miss occurs when one block needs to replace another occupied block. A capacity miss occurs when a cache is not able to hold all the data and needs to continually replace its own data. For example, if a cache holds 4 lines (and 2 words per line) and you wish to read in 15 words of an array into a fully associative cache with LRU. That’s a capacity miss since the array only held 8 words and you had to read in 4 more blocks into the cache during that one reference to get the last 7 words. If you had wanted to perform c[i]=b[i]+a[i] in a direct mapped cache then that would be a conflict miss since they’d all be competing for the same cache line.
