What was the hardware configuration of the multiprocessor 11/70?
The system was a shared-memory, symmetric multiprocessor. Between one and four CPUs were supported. Any subset with at least one disk, one memory, one CPU and a console terminal was capable of running the operating system. Each of the CPUs had independent consoles. There were also other elements such as the interprocessor interrupt mechanism. A mechanism is needed to get the attention of another CPU when scheduling. Those were done through the Interprocessor Interrupt and Sanity Timer (IIST), a slightly modified CSS product called the DIP11. The CPUs had separate I/O buses. There were some peripherals on one or another I/O bus. There were also bus switches between the various buses so that peripherals could be moved around. Other than “who handles the clock interrupt,” since there can be only one clock updating the calendar at a time, there were no distinctions between the CPUs. All were scheduled as resources, and the system was truly symmetric. Source: The Big Book of RSX Application
