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What is the power source for differential and pseudo-differential IOs in Stratix III devices?

April 26, 2017Devices Differential III IOS power source Stratix stratix iii

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What is the power source for differential and pseudo-differential IOs in Stratix III devices?

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Solution When using differential standards on dedicated clock input pins in the top and bottom banks in Stratix® III devices, they are powered by the differential clock power supply VCCCLK_IN, which must be connected to 2.5V. VCCCLK_IN is independent of VCCIO and VCCPD. When using differential inputs in the top and bottom banks, the input buffers are powered by VCCPD, which must be connected to 2.5V. When using differential outputs in the top and bottom banks, the output buffers are powered by VCCIO, which must be connected to 2.5V. When using differential inputs in the side banks, the input buffers are powered by VCCPD, which must be connected to 2.5V. When using differential outputs in the side banks, the output buffers are powered by VCCIO, which must be connected to 2.