What is the difference between superscalar and superpipelined architectures? Why are they usually used on RISC machines?
A superpipelined architecture extends the idea of pipelining. In normal pipelining, each of the stages takes the same time as the external machine clock. However, not all pipeline stages need the same amount of time. For example, instruction decoding (specially in a RISC machine) is faster than the other stages such as fetches and stores. A superpipelined architecture exploits this by having an internal clock which is faster (typically double) than the external clock. Thus, in the same external clock cycle, we can overlap two subtasks of two different instructions.A superscalar architecture concentrates on optimizing scalar instructions (those which act on single data elements) rather than vector data (data consisting of a vector, i.e, a row, column, or matrix of elements, typically floating point), because most applications in business and industry work with scalars, not vectors. The main idea here is that each stage handles the subtask of _more than one instruction_ at any given poin
