What is the difference between CPLD and FPGA ?
At this point in time the main two differences are: • CPLD’s typically have far less resources • CPLD’s typically have internal E squared or Flash rom, and thus power up “instantly”, programmed and ready to go.There is some overlap now, between “resource rich” CPLDs and “resource poor” FPGA’s.. (Big vs Small is not quite the right description since package size is only weakly related to the number of resources a device contains) Traditionally CPLD’s had a simpler internal architecture of: • A bank of inputs feeding: • An “And/Or” array feeding: • A bank of outputs with feedback wiring paths from the outputs back to the input side of the And/Or Array.Newer CPLD’s can be more like an FPGA which usually has a two dimensional array of “logic blocks” which can be interconnected in many ways, all connecting to an Input/Output ring of dedicated electronics to make connection to the outside world via the device I/O pins.
