What is the difference between Cascade coprocessor synthesis and custom instruction set processor (CISP) design using EDA tools?
Configurable IP approaches to CISP design require varying degrees of processor design expertise, generally requiring a processor architectural description in a proprietary language. As with EDA approaches to CISP design, use of an instruction set that is different from the processor for which the legacy software was originally developed mandates redevelopment of the embedded software. By contrast, Cascade requires no processor design expertise. Cascade automatically generates both the optimum coprocessor architecture and its RTL implementation in a matter of days. Moreover, legacy software is re-used ‘as is’. It is thus an expert coprocessor design tool for both embedded software developers and RTL implementation designers.
