What is special about the SPI interface on the VRS51L2070/3xxx?
One of the unique features of the SPI interface is that its transaction size is adjustable from 1 to 32 bits. Transactions over 32 bits, in multiples of 8, are possible with careful interrupt management. The SPI also allows automatic control of the chip select (CS) lines. This eliminates the need for the user program to bring the I/O connected to the CS line low before the SPI transaction begins and bring it back up when the transaction is complete. The SPI interface also provides a CS manual mode that will keep the CS line low when a transaction is complete. With these features, the SPI is the ideal high-speed interface for A/D & D/A converters, F-RAM memory devices, DSP host systems, etc.
