What is an LDO (Low Drop-Out) Regulator?
An LDO is a type of linear regulator. A linear regulator uses a transistor or FET, operating in its linear region, to subtract excess voltage from the applied input voltage, producing a regulated output voltage. Dropout voltage is the minimum input to output voltage differential required for the regulator to sustain an output voltage within 100mV of its nominal value. LDO (Low Drop-Out) regulators for positive output voltages often use a PNP for the power transistor (also called a pass device). This transistor is allowed to saturate, so the regulator can have a very low drop-out voltage, typically around 200mV compared with around 2V for traditional linear regulators using an NPN composite power transistor. A negative-output LDO uses an NPN for its pass device, operating in a manner similar to that of the positive-output LDO`s PNP device. Newer developments using a CMOS power transistor can provide the lowest drop-out voltage. With CMOS the only voltage drop across the regulator is the
