What is a repetitive multi-transition (RMT) pattern?
Patterns where more than one Low-High transition takes place in a clock cycle over multiple cycles is called a RMT pattern. This occurs when any bit, except bits such as DIN9 (for the 10-bit embedded clock SerDes), is held at a low state and the adjacent bit is held high, creating a 0-1 transition. This could prevent a LVDS receiver from locking or cause it to lock to the fixed 0-1 data bit instead of the actual embedded clock bit.
