What is a command to stop in verilog?
$stop and $finish. $stop system task puts the simulator into a halt mode, issues an interactive command prompt, and passes control to user. $finish system task simply causes the simulator to exit and pass control back to the host OS. Both tasks takes an optional expression parameter that determine what type of diagnostic message is printed before the interactive command prompt is issued. If no parameter is supplied, then the task defaults to a parameter value of 1.