What does the Xilinx design reuse initiative involve?
The intent of the initiative is help customers implement designs for reuse and share their intellectual property internally. The first offerings include the IP Internet Capture and IP Internet Interface tools and an FPGA design reuse manual. The IP Internet Capture tool allows customers to easily capture and package intellectual property they have already created for Xilinx FPGAs and share it inside their company with other design teams over the Internet. The IP Internet Interface tool provides customers and third-party developers a method to integrate their own parameter-driven IP with the Xilinx CORE Generator system. These designs can be distributed or sold over the web in a secure environment. As part of the initiative, Xilinx also announced the publication of the “ASIC Designers Programmable Logic Reuse Manual,” a supplement to the “Reuse Methodology Manual” from Synopsys and Mentor Graphics. The Xilinx reuse manual provides guidelines for designers who want a common strategy for
