What are the general PCB design recommendations for National Semiconductor\s Interface Devices?
Use at least 4 PCB board layers (top to bottom): LVDS signals, ground, power, TTL signals. Dedicating planes for VCC and Ground are typically required for high-speed design. A solid ground plane is required to establish a controlled (known) impedance for the transmission line interconnects. Narrow spacing between power and ground planes will also create an excellent high frequency bypass capacitance. b) Isolate fast edge rate CMOS/TTL signals from LVDS signals, or they may couple crosstalk onto the LVDS lines. It is best to put TTL and LVDS signals on a different layer(s) which should be isolated by the power and ground planes. c) Keep drivers and receivers as close to the (LVDS port side) connectors as possible. This helps to ensure that the differential lines do not pick up noise generated from the board, which can result in higher EMI. This recommendation also helps to minimize skew between the lines. d) Bypass each LVDS device and also use distributed bulk capacitance. Surface moun
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