What are the block sizes of the L1 and L2 caches?
A4: The block size for both the L1 and the L2 caches is 64 Byte. • Q5: In the sample prefetcher, at every cycle 4 prefetching requests are generated for the L1 cache yet only 1 is generated for the L2 cache. Why? A5: This is configured according to the simulator configuration. At one cycle up to four records can be given depending on the number of requests (up to four) issued to the L1 data cache. Therefore at every cycle 4 prefetching requests are generated for the L1 cache in the sample prefetcher. If a requested address misses in the L1 data cache, a request will be placed in the L1 queue. This means that the accesses to the L2 cache at a single cycle depends on the bandwidth of the L1 queue, which is a parameter changed across various configurations. In the 1st configuration, the queue bandwidth is unlimited. In the 2nd and the 3rd configurations, the queue bandwidth is limited to 1. Therefore the sample prefetcher only checks a single request to the L2 cache at every cycle. • Q6:
