What are the architectural characteristics of the 6x86MX?
Although the 6x86MX is based on 6×86 core technology, the 6x86MX wrings extra performance out of slower clock speeds from architectural tweaks designed to let it handle data more efficiently and an increase in the size of the cache memory. The L1 cache has been increased from current 6×86’s 16KB to 64KB, twice the Pentium II’s 32K. Cache memory is integrated into the processor and can feed data to the processor at high speeds. Internal memory-management tricks reduce the need for the Cyrix chip to continually access standard RAM, which is slower than internal memory. In the 6x86MX-PR233 Cyrix uses a 75-MHz system bus which is faster than the 66-MHz bus used by Intel and AMD. Like the 6×86, the 6x86MX chip will offer most of the Pentium Pro’s most attractive features – including register renaming, out-of-order completion, and speculative execution. Unlike the 6×86, the 6x86MX will boast optimization for 32-bit code and for MMX. MMX is an extension to the x86 instruction set that allows
