Virtex LUT equation syntax in Xilinx EPIC 1.5?
15286: 99/03/17: Allowed logic functions in Virtex LE 15319: 99/03/18: Re: Allowed logic functions in Virtex LE 15332: 99/03/19: Re: Allowed logic functions in Virtex LE 15540: 99/03/30: Re: HELP NEEDED: FPGA and Neural Networks 15559: 99/03/30: Re: FPGAs with ECL-compatible I/Os 28424: 01/01/12: JTAG configuration fails with XC95144XL 32325