V configuration of Spartan-3?
106161: 06/08/08: Re: 100 Mbit manchester coded signal in FPGA 106173: 06/08/08: Re: 100 Mbit manchester coded signal in FPGA 106193: 06/08/08: Re: Question about SSTL 106280: 06/08/10: Re: Switching two (synchronous) clocks with variable phase difference, 106445: 06/08/13: Re: Maximum Current Draw of FPGA 106446