Is the DCD pin tri-stated on loop-back mode or is it susceptible to noise?
A24. When the device is put into loop-back mode, there is an automatic MUX inside the device to allow the loop-back process. Any floating input pins will draw additional current but the fact that they are floating should not affect the device operation. Weak pull up/down (opposite the active state) for unused pins are suggested in any application. Q25. (a.) Is the TC input necessary for a DMA transfer? (b.) Can I terminate a DMA transfer by disabling the DMAEN bit instead of using TC? Any probable errors? A25. (a.) The TC input is normally asserted by the system DMA controller to indicate it has reached the last programmed data transfer. TC is accepted only if FDDACK# or PPDACK# is asserted. However, there is another technique: (b.) The Extended Control Register (ECP Mode) has a DMA Enable bit (DMAEN). When DMAEN=1, DMA is enabled and the host uses PPDREQ, PPDACK, and the TC pin to transfer data. When DMAEN=0, DMA is disabled and the PPDREQ output is tri-stated. In this case, programme
