Is the analogue part somehow separated galvanically from the digital component resp. how low is the sensitivity of failure?
Designing the ASIC, the separation between analogue and digital part has been of great importance to us. They are spatially separated and also have their own supply voltages and mass pins. There is no cross talk noticeable with the ASIC. But there is no electrical isolation between analogue and digital part. On the contrary: both areas have to be connected low-resistance directly at the ASIC (VSS, VSSD). With reference to overcoupling of high-frequency clock signals, both areas are of course decoupled so well by a suitable design that the 100 Ohm resistor will allow the resolution of 1 mA DC-currents.
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