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In the Transrater implementation, is the DSP still being interrupted by the Hdvicp ARM 968 every MB-pair?

April 26, 2017arm DSP hdvicp Implementation interrupted transrater

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In the Transrater implementation, is the DSP still being interrupted by the Hdvicp ARM 968 every MB-pair?

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Yes, the Decoder Hdvicp ARM 968 (Hdvicp 1) interrupts the DSP ever 2 Macro Blocks. So there are still some cycles left on the DSP which can be used to schedule an audio task. But scheduling this requires very careful optimization so as avoid cache thrashing for the video for every MB-pair.