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I need to know how many thermal vias will be required beneath a surface mount component. Can Sauna model and optimize circuit board vias?

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I need to know how many thermal vias will be required beneath a surface mount component. Can Sauna model and optimize circuit board vias?

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Yes. You would create a “stackup” model. The layer-to-layer resistance would be based on the via type, size and density, as calculated with Sauna’s Toolbox. For more information, see the circuit board exercise (basicbrd.pdf) on the evaluation package CD.

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