I cannot see the internal oscillator signal at the CLK1M pin. What is the problem?
A. The CLK1M bit in the Configuration register must be set to “1” and the TEST pin must be set to VDD. Contact the factory if the problem persists. • Q. My signal conditioner does not start in analog mode. What is the problem? A. One or more of the followings can be the problem: –Evaluation board, KEY, etc., not connected correctly. – Signal conditioner not configured correctly for analog mode: a) Low byte of the Control register must contain a non-zero value, e.g., 0xFFFF. b) The UNLOCK pin must be pulled low or connected to VSS. – The VDD supply requirement is not met. See Application Note 3733, Startup Requirements for the MAX1452/MAX1455 Signal Conditioners. – The VDDF supply requirement is not met. See Application Note 3733, Startup Requirements for the MAX1452/MAX1455 Signal Conditioners. • Q. What is the VDD voltage level which indicates that the signal conditioner is completely turned off? A. 0.5V. This voltage will guarantee that all transistors are turned off. Reapplying VDD
