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How to instantiate a Hard-Macro in a design?

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How to instantiate a Hard-Macro in a design?

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49974: 02/11/27: HardMacro (from FPGA Editor) Instantiation 50006: 02/11/27: Re: HardMacro (from FPGA Editor) Instantiation 50045: 02/11/29: Re: System Generator and 18×18 multipliers 50046: 02/11/29: Re: programmable FSM 50100: 02/12/02: MetaStability Issue on BRAMs 50135: 02/12/03: Parameterising the Core-gen Macro…..!!!

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