How to import EDIF file in Foundation Software?
17734: 99/08/27: test! 17735: 99/08/27: PLL cascading in VIRTEX 17950: 99/09/18: test 18101: 99/09/30: Fine grain vs. Coarse grain 18109: 99/09/30: Re: Fine grain vs. Coarse grain 18777: 99/11/14: test 19099: 99/11/29: FPGA vs DSP vs PENTIUM MMX 19127: 99/12/01: Re: FPGA vs DSP vs PENTIUM MMX 19688: 00/01/08: XC4000 Configuration Bitstream structure 19761: 00/01/11: Re: XC4000 Configuration Bitstream structure 19965: 00/01/20: Xilinx vs. other FPGAs manufactrers 20077: 00/01/26: EEPROM based FPGAs 20339: 00/02/06: Availability of Virtex E Series 20340: 00/02/06: FG1156 package for non-E XCV1000 20341: 00/02/06: Re: Availability of Virtex E Series 20465: 00/02/11: RLOC_RANGE property. 20466: 00/02/11: RLOC_RANGE property. 20467: 00/02/11: RLOC_RANGE property. 20504: 00/02/12: Re: RLOC_RANGE property.