How to implement a bidirectional bus?
Please look at the example in PDF format. 5.2.3 – Some misunderstandings between input and output variables They both can be used as wires. Any output variable cannot be read such as if (out==1) is invalid. If an output variable is designated as a state variable, it must be additionally declared as a “reg” variable.In addition, an output of a combinational circuit described using an “always” construct, “reg” declaration is also necessary. 5.2.4 – Some misunderstandings on the “reg” variable. As explained earlier, a “reg” variable can be either a state variable of a sequential circuit or an output of a combinational circuit described using an “always” construct. The “reg” declaration does not always imply a register. 5.2.5 – Non-blocking vs. blocking assignments in the always block We always recommend the students use “non-blocking” assignment as the synthesis tool cannot synthesize the “block” assignment behavior.
