How should the connection to the TRST signal be terminated?
There is some confusion about the termination of the JTAG TRST signal. This signal is also called the nTRST signal, referring to the fact that the logic is inverted. When TRST is high, the emulation logic is out of reset. When TRST is low, the emulation logic is in reset. The databooks on TI devices report that the DSP includes an internal pulldown (IPD) on the TRST pin to ensure that TRST will always be asserted on power up, and the DSP’s internal emulation logic will always be properly initialized when this pin is not routed out. JTAG Controllers from Texas Instruments actively drive TRST high. However some third-party JTAG controllers may not drive TRST high, but expect the user of an external pullup resitor on TRST. When using this type of JTAG controller, assert TRST to initialize the DSP after powerup and externally drive TRST high before attempting any emulation or boundary scan operations” There has been confusion as to whether this means that a external pullup should be used o
