How is the latch-count (LC) bit used to set the time interval for the bit and error counters of the DS21372, DS2172, and DS2174?
A3. Both the bit and error counters of the BERT devices contain a second shadow register that is used to latch the current value. When the LC bit is set from 0 to 1, two events occur. First, the current value of the bit and error counters is latched in the shadow registers. Second, the bit and error counters are cleared and will resume operation. The software can then access the shadow registers to read the previous count values. To measure the bit and error counts from time T0 to T1, the following procedure is necessary: At time T0, set the LC bit from 0 to 1. This will clear the bit and error counters and latch the previous count values, which can be discarded. At time T1, set the LC bit from 0 to 1. This will clear the bit and error counters and latch the count values from time T0 to T1, which the software can access.
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