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8122: 97/11/19: Re: XC: bitfile to ASCII file 8241: 97/12/03: Re: REPOST: “Verilog Won & VHDL Lost — You Be The Judge” 8368: 97/12/10: Re: what is metastability time of a flip_flop 8408: 97/12/12: dynamic power in Xilinx designs 8455: 97/12/16: Re: metastability: full citation of Hohl, extracting TAU and T0 9480
