How does the CPC710 handle interrupts when it does not have a interrupt controller?
True, the CPC710 doesn’t have an interrupt controller – but it does allow some level of processor-initiated, PCI64 bus master-intiated, and DMA-initiated interrupts. Processor-initiated interrupts: G_INTA#, G_INTB#, G_INTC#, G_INTD# – These signals are tri-state outputs from the CPC710 to the PCI64 bus. Pull-ups are required on these signals. The processor may signal an interrupt on one or more of these lines by writing ‘1’s to the ‘Set PCI-64 Interrupt Register’ (INT_SET register). The interrupts may be reset by either a processor or by a PCI bus master writing to the “Reset PCI-64 Interrupt” (INT_RESET) register. Only a processor can set the interrupt bits, but they may be reset by either a processor or a PCI64 bus master. Processor or PCI64 Initiated interrupts: IT1# – This signal is an output from the CPC710 and may be used by external hardware to signal an interrupt from a PCI64 bus master or a PowerPC CPU. This interrupt is asserted by writing a non-zero address to the “Set Addre
