How does the bridge know to forward a transaction to the correct bus? Will PCI traffic on either secondary bus to the other secondary bus of the same bridge IC impact traffic at the primary bus?
At boot up, the BIOS probes each PCI bus to look for PCI devices that have memory or IO requirements. When finished reading all possible device numbers, the PCI Bridge, which owns that PCI bus, has memory ranges programmed for (I/O, non-prefetchable memory, and prefetchable memory). This continues until BIOS has found all PCI buses and all devices on those buses. After that, whenever a PCI transaction happens, the bridge checks the address of the target against the memory RANGE programmed at each bus within the BRIDGE configuration register. If the initiator is on a secondary bus and the target address is outside the ranges (start address until end address) of all the memory and I/O address registers, the transaction is forwarded to the primary PCI bus for some other device to claim it. If the initiator is on the primary PCI bus and the target address does not decode to one of the address ranges in config register 0 (for bus S1) or config register 1 (for bus S2), then the bridge does n
Related Questions
- How does the bridge know to forward a transaction to the correct bus? Will PCI traffic on either secondary bus to the other secondary bus of the same bridge IC impact traffic at the primary bus?
- Is the primary PCI bus idle/available for use while traffic moves from S1 to S2?
- What impact will the 4-lane work and the bridge work have on traffic flow?
