How does memory access work, and what do the timings stand for?
MEMORY ACCESS: 1. tRCD (RAS to CAS Delay) 2-3 cycles, The row is selected by the Memory Controller. 2. CAS (Column Address Strobe) 2,2.5,3 cycles (DDR), The Memory Controller selects the column and now the ROW is ACTIVE, and the READ COMMAND is sent. 3. Data is sent to the DQ pins after CAS delay. 4. tRAS (Row address Strobe) 6 cycles, The module waits a certain period of time for the data to be active. 5. tRP (RAS precharge) 2 cycles, The Memory Controller DEACTIVATES the row. 6. Memory Cycle repeats as requested by the Memory Controller.
