How does Impulse C compare to Celoxicas Handel-C?
Handel-C™ provides the ability to describe FPGA and ASIC hardware elements using a C-like language as an alternative to VHDL or Verilog programming. Handel-C provides direct control over parallelism by allowing the application developer describe such things as clocks and resets, and by specifying (through the use of “par” and other statements) how C code is parallelized when implemented as hardware. The specification of clock timing and statement-level parallelism is the most fundamental difference between Impulse C and Handel-C. Handel-C requires that clock boundaries be clearly specified by the programmer, while Impulse C does not. Impulse C is designed for software programmers who are familiar with C programming, but who may not be familiar with hardware design concepts. Impulse C therefore does not require the specification of clocks, resets or statement-level parallelism. Instead, Impulse C assumes that the compiler will automatically extract parallel behaviors from a given block
