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How does ClearBlue deal with designs that have multiple clock domains?

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How does ClearBlue deal with designs that have multiple clock domains?

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Clock-domain handling is entirely under the user’s control. Analysis can be done on a clock-domain basis, with analysis instruments operating at the same frequency as the signals being analyzed. ClearBlue also supports signals that cross one or more clock-domains. Signals from multiple clock-domains can be fed into a multiplexer network that contains pipeline resisters, synchronizing registers, and/or FIFOs for buffering the signals. The network is constructed with signals from lower frequency domains fed through higher frequency domains, such that FIFOs may under-run but not overflow. The signals are typically connected to analysis instruments that operate at a clock frequency equal to the highest frequency clock-domain feeding the network. The number and location of analysis instruments, as well as the composition of each signal network, are entirely under user control such that clock-domain crossings can be minimized or maximized depending on post-silicon application needs.

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