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How do simultaneous data and clock signal jitter prevent readability?

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How do simultaneous data and clock signal jitter prevent readability?

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Jitter imposes a twofold penalty. First, data-signal jitter narrows the viewing window for determining one or zero values (see Fig. 4a). Second, jitter on the clock signal displaces the rising edge from the center of the data window (see Fig. 4b). As is shown in Fig. 4c, excessive data and clock signal jitter cause the clock’s leading edge to see a zero when the true information content is a one. Fig. 4. The early clock signals coincide with the late data signals to read zero when actual value is one, and the late clock signals look at early data signals, again seeing zero when the value is one.

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