How can VeloceRF help reduce silicon area?
VeloceRF supports arbitrary inductor shapes and aspect ratios and very accurately models their mutual coupling. This enables the designer to optimize inductors for a given area and produce a tightly packed layout. Guidelines imposing minimum inductor-to-inductor clearances may be abandoned, since all inductive interactions can be simulated. In most cases, designing with VeloceRF can save up to 30% of silicon real-estate, compared to conventional inductor design approaches.
Related Questions
- Can Enhancing Eye Treatment with Co-Q10 help to reduce wrinkles around my eye area as well as get rid of dark eye circles and improve puffy eyelids?
- How do the Silicon Graphics visual workstations help reduce total cost of ownership and improve manageability?
- How else can I help reduce stormwater pollution in my area?
