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How are the test vectors interpreted?

interpreted Test vectors
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How are the test vectors interpreted?

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A. To illustrate by example: V W R 0003 0001 means vector write to register 3 the value 0001. V R R 0000 0040 means vector read (and verify) of register 0 the expected value 0040. V W M 0000 0655 means vector write to memory location 0 the value 0655. Q. I downloaded the test vectors from the DDC web page. It turns out that there is a acelib function that loads and executes these vectors. The function is called BuVectorTest(). I’ve used BuVectorTest() to run the BC/RT/MT vectors (TEST.VEC) on our Radstone PMC1553 card. There appear to be only a couple of failures, all in the “Interrupt Status Register & Interrupt Mask Tests” section. Could you take a quick look at the failures below? The first failure is at line 85 of TEST.VEC: V R R 0013 ECEB The register address 0013 (hex) appears to be test mode register 3, which isn’t documented in the ACE user’s guide. The expected data is ECEB, but we get ECFB. If I comment out line 85 (with the letter ‘D’ at the beginning of the line), I get a s

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