free/demo/low cost verilog synthesis tools available?
17916: 99/09/16: Re: Xilinx development board > XVC400 17943: 99/09/18: Re: speeding up place and route 17944: 99/09/18: Re: Xilinx XC4005E 17945: 99/09/18: Re: DSP in FPGA 17946: 99/09/18: Re: Question about Alliance 2.1i 17953: 99/09/19: Re: Loadable arithmetic in Virtex 17954: 99/09/19: Re: Virtex global set/reset 17960: 99/09/19: Re: Loadable arithmetic in Virtex 17963: 99/09/19: Re: Loadable arithmetic in Virtex 17965: 99/09/19: Re: Loadable arithmetic in Virtex 17974: 99/09/20: Re: Programming Spartan XL 17992: 99/09/21: Re: [Q] simple Queue implementation with external RAM 18004: 99/09/22: Re: Virtex questions 18028: 99/09/24: Re: Synopsys inside Foundation 2.1i does not infer fast-adder 18073: 99/09/27: Re: New Xilinx Virtex-E is out!