FPGA to manage serial DAQ?
20078: 00/01/26: Re: EEPROM based FPGAs 20080: 00/01/26: GSR in HDL on instantiated flip-flop primitives 20089: 00/01/26: Re: Altera Quartus vs Xilinx Place and Route tools (help needed) 20108: 00/01/27: Re: GSR in HDL on instantiated flip-flop primitives 20109: 00/01/27: Re: GSR in HDL on instantiated flip-flop primitives 20110