Does using a guard ring affect pad spacing?
Use of a guard ring does not effect pad spacing. Our general recommendation is that pads are 100 µm x 100 µm with a pitch of 170 µm (allows for pad edge to pad edge spacing of 70 µms). Smaller pads and tighter pitch are possible but not without considering the exact location of the package cavity pins, angle of wire to the pins and length of the wires. 4.0 How do I draw a thick oxide transistor? For processes that provide a “thick oxide” option (for operation at voltages above the standard process voltage), the MOSIS Thick_Active layer selects which active areas receive the thick gate oxide. Active by itself will have the standard process thin (gate) oxide. Active overlapped by Thick_Active will have the thicker gate oxide. Thick_Active by itself does nothing. Anything outside Active (regardless of whether Thick_Active is present or not) gets field oxide. Poly crossing a thin oxide region (OD, or Active) surrounded by a thick oxide region (OD2, or Thick_Active) creates a thick oxide tr