Does the Silicon Explorer probe circuitry require the use of additional internal device resources?
No, this is one of the major benefits of the debugging system. Each Actel anitfuse FPGA has built-in, dedicated circuitry just for probing purposes. The Silicon Explorer does not require any logic cells or routing when probing the device. Additionally, Silicon Explorer does not require or sacrifice device I/Os. On SX-A and eX devices, the JTAG pins are used to control probing. On the older families, special probe pins are used for probing. Regardless of the device, all of the probe pins can be used as user I/O except for the MODE and TMS pins. Once the device enters probe mode, the I/Os switch to the probe functionality. Actel recommends not using these pins as inputs, as they will not be available as inputs during probe mode.
