Does the gate-counting method for Virtex-E differ from the method used to calculate the original Virtex series?
The gate counting used on Virtex-E devices is consistent with the system gate counting used for the original Virtex devices. The basics of the system gate count equation are each logic cell used as logic provides 12 system gates; each logic cell used as distributed memory provides 64 system gates (16 bits x 4 gates/bit). Since larger devices typically require more memory the percentage of logic cells used as distributed memory ranges from 530 percent across the family. With Virtex devices additional capabilities add to the system gate count. Each DLL used provides 7000 system gates and each logic cell used as a programmable delay element provides 112 system gates. Finally, block memory adds to the gate capacity of Virtex device and each bit of block RAM memory provides four system gates. Up to 40 percent of block memory usage is factored into the system gate count.
