Do the drivers as part of the XDS2000i reference design abstract the interface to Intel’s QuickAssist?
Yes. Our Monte Carlo demo actually demonstrated the benefits of QuickAssist in addition to the speed-up improvement result from using our accelerators. We were able to successfully disable the ISA (in-socket-accelerator) and QuickAssist automatically ran the algorithm in the CPU, since the accelerator resource was deemed “unavailable”. Q: Initially I am looking to code up the algorithms in C for rapid prototyping, I do have a VHDL expert at hand however, but I am treating optimization as an iterative step in the design program. Is this a reasonable approach? A: This is actually how we developed our own database product. We designed a software-only version in ‘C’ and ran it on two CPUs. We then offloaded key processes to the FPGA to integrate the accelerator. This approach worked well. In addition, you can also leverage “C-to-Gates” tools like ImpulseC and AutoESL to automatically accelerate CPU cycle intensive tasks in the FPGA.
