Do silicon debug results justify investment in DFD?
Srikanth Venkataraman, Intel Rob Aitken, ARM Industry data shows that more than 60% of complex chip design projects require one or more respins. Silicon debug is becoming one of the most time-consuming stages in the creation of a new SoC, taking up to one-third of the development cycle. Design for debug (DFD) is an emerging technology that inserts a debug infrastructure into the design of the SoC to simplify and speed up the silicon debug process. This panel presented results of silicon debug—both successes and failures—and analyzed the corresponding trade-offs between design costs (area and delays) and benefits (time to market, avoiding respins, and faster yield learning). The panel was organized by Srikanth Venkataraman of Intel and moderated by Rob Aitken of ARM. The panelists were Miron Abramovici (DAFCA), Zahi Abuhamdeh (TranSwitch), Bruce Cory (Nvidia), Al Crouch (Inovys), Bob Gottlieb (Intel), and Bart Vermeulen (NXP Semiconductors). The panel focused on the definition of infras
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